Generally, a semiconductor memory stores data or outputs stored data to an exterior by operating periphery circuits in an active state, and minimizes power consumption by disabling unnecessary periphery circuits in a stand-by state.
In particular, in order to minimize unnecessary power consumption in a stand-by mode, a mobile semiconductor memory enters a deep power down (DPD) mode to stop operations of periphery circuits. There are two ways of entering the deep power down mode, one is by a pad and the other is by a command. A user can select one of these two ways and generally the memory is configured to allow the user to make such selection by fuse cutting.
FIG. 1 is a circuit diagram illustrating a conventional pad input signal processing circuit.
Referring to FIG. 1, the conventional pad input signal processing circuit shown therein is configured to enter the DPD mode by a command or a pad, as selected using fuse option.
Referring to the DPD mode entry by a command, a pad input terminal becomes a logic low level through NMOS transistors which are turned on in response to a power supply voltage VDD. Therefore, a signal DPD_PAD which went through an input buffer always becomes a logic low level. A signal CMD_DPD is a signal that becomes a logic high level in the case of entering the DPD mode by a command and a deep power down mode signal is controlled only by the signal CMD_DPD.
Referring to the DPD mode entry by a pad, a fuse connected to the pad input terminal is cut and at the DPD mode entry, a logic high level is applied from an external pin connected to the pad. Since the signal CMD_DPD by a command always maintains a logic low level, the deep power down mode signal is controlled by an external pin.
However, such a conventional technique requires the cutting of a fuse when entering the DPD mode by a pad. If a memory enters the DPD mode by a pad without cutting a fuse, it does not have any operational problem. However, when entering the DPD mode by a pad, there is a problem of current consumption through a fuse and NMOS transistors under the condition that the pad input terminal is in a logic high level. Such unnecessary current consumption is critical in the DPD mode in which current specification is several μA. In addition, since the fuse cutting is post-processed upon the request from an orderer, it is difficult to keep stocks, resulting in late customer response.